1. Field of the Invention
The present invention relates to a chemical/mechanical polishing method for STI and, more particularly, to a chemical/mechanical polishing method for STI which can be used for flattening wafers during shallow trench isolation in manufacturing semiconductor devices.
2. Description of Background Art
The storage capacity of memory devices has remarkably increased with the increase in the degree of integration, multilayer wiring, and the like of semiconductor devices. This is supported by the progress in microfabrication technologies. However, there are problems such as an increased chip size in spite of using multilayer wiring and the like and an increased cost for production of chips because of an increased number of production steps due to the progress in microfabrication technologies. In this situation, a chemical/mechanical polishing technology has been introduced into polishing of processed films and the like and has attracted attention. Many microfabrication technologies such as flattening have been put into practice by applying the chemical/mechanical polishing technology.
A shallow trench isolation (STI) technology is known as such a microfabrication technology, for example. In the STI technology, flatness of processed films such as an insulating film is important. An optimal abrasive flexibly responding to convexities and concavities of processed films is indispensable.
To respond to the progress of the STI technology at a high degree, an object of the present invention is to provide a chemical/mechanical polishing method for STI which can form a highly flat polished surface with minimal dishing and scratches on an object to be polished even if the object has convexities and concavities on the surface.